# Machine Learning Infrastructure Engineer, Kernel Optimization

Canonical page: https://efference.ai/careers/ml-infrastructure-engineer-gpu-systems/

Machine Learning Infrastructure Engineer, Kernel Optimization at Efference. San Francisco · Full time · On-site. You'll make robot models run efficiently on datacenter GPUs, reducing inference latency and the compute cost of serving a fleet.

You'll make robot models run efficiently on datacenter GPUs, reducing inference latency and the compute cost of serving a fleet. You'll work from model-level profiling down to GPU kernels, verifying that each optimization preserves the behavior the robot depends on.

## What you’ll do

- Profile representative perception and robot-policy workloads, separating kernel execution, memory movement, synchronization, launch overhead, and CPU bottlenecks.
- Implement and optimize CUDA or Triton kernels for expensive operators, using fusion, tiling, suitable layouts, and reduced memory traffic where they help.
- Improve inference graphs and execution paths through compilation, graph capture, allocation reuse, and elimination of unnecessary host-device transfers.
- Evaluate precision and quantization choices with researchers, checking numerical error and closed-loop task performance alongside speed and memory use.
- Benchmark realistic batch sizes, sequence lengths, image shapes, and concurrent sessions with the orchestration team, including tail latency under contention.
- Maintain correctness and performance regression tests across hardware and software versions, and upstream improvements where a shared library is the right home.

## What we are looking for

- Experience delivering measured performance improvements in GPU workloads or high-performance ML systems.
- Strong CUDA or comparable GPU programming skills and understanding of memory hierarchies, occupancy, synchronization, and parallel execution.
- Proficiency in C++ and Python and experience with PyTorch or another major ML framework.
- Ability to use profiling tools to identify the limiting resource and choose an optimization that addresses it.
- Careful benchmarking and correctness practice, including handling precision changes and separating microbenchmark gains from application gains.

## Nice to Have

- Experience with Triton, CUTLASS, TensorRT, compiler internals, or custom framework operators.
- Work on attention, vision encoders, diffusion or flow models, and small-batch latency-sensitive inference.
- Experience with multi-GPU communication, training kernels, model parallelism, or performance tuning for shared accelerators.